| commit | bf67046504692954153a0c987b8d4619c51b2cc3 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 11:34:37 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 11:34:37 2021 +0000 |
| tree | 25daf8bdc21e1d74f7423d2d3cf3dbb409f79d5f | |
| parent | 6ceb4626c904ada870eec71415c7d6864aef9502 [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
