| commit | 858ed9506ecc6e897fba49a99ea82c1fc6a1969e | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 10 01:24:31 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 10 01:24:31 2021 +0000 |
| tree | 72c7342f70c4972452d1e5bcad7957308ae5ea5d | |
| parent | 74fd2f18f832cc414bf00ec00ed478d9a1b64608 [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
