| commit | efa4dd07aeae6532bc939c8084da880f13f75804 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Thu Dec 09 17:23:21 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Thu Dec 09 17:23:21 2021 +0000 |
| tree | 8f84bfa1b8dedaa6a46e7c794729972be0274571 | |
| parent | b765d20c60114bfab06ab11c1a96e91c5dbedfdc [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
