| commit | 75f9fe87749f5631736ad0307276e8c725f11716 | [log] [tgz] |
|---|---|---|
| author | Zeeshan Rafique <36025181+zeeshanrafique23@users.noreply.github.com> | Sun Jun 27 00:31:04 2021 +0500 |
| committer | GitHub <noreply@github.com> | Sun Jun 27 00:31:04 2021 +0500 |
| tree | a8e612ab4ec6e077dfa5edf425c81c92dfb3a68d | |
| parent | ec1a2c7b0967e58bf86a64f08f6e8618cd9c5ccf [diff] | |
| parent | 12b2842f01091580551be492455d47366746449f [diff] |
Merge pull request #6 from sajjadahmed677/submission-mpw-two reset issue of pwm flops resolved
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
