| commit | 3a27dbc68e9b3cb4750a7f600a6090405b628dd1 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Wed Aug 04 03:12:31 2021 -0700 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Wed Aug 04 03:12:31 2021 -0700 |
| tree | 83f3c2dfcc33b439ec41e88cdb856a91393c65cf | |
| parent | 35cbceb541e4fe7b80699f52ba6c4944c5819a35 [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
