| commit | 1fc8e9d3ac17e2349f9c9b7ec6260dc5ba8859c8 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 27 09:02:54 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 27 09:02:54 2021 +0000 |
| tree | 69e35623c1749ab2b5af762265427c5c06acfb85 | |
| parent | d418fd4d0c17d714d2ed5c67ddbea3ae960f57ec [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
