| commit | cf8cc94483cd00f6ca438f30f09fd9a6870846ff | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Thu Aug 19 09:32:29 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Thu Aug 19 09:32:29 2021 +0000 |
| tree | ca13e8517f733c9afff3bfc17c0f9a783104bdd6 | |
| parent | 4e0e4300059d4e91a849a9dcda8e05ee5b7c8657 [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
