| commit | 03715df576702bf644a69567d121857cd0ba67b8 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Thu Jul 29 22:44:41 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Thu Jul 29 22:44:41 2021 +0000 |
| tree | 1fe99dbdf735405dd941d61135bb147a606864dd | |
| parent | 3fc130efb026b85280e90e0a0a3007cb4efe9c89 [diff] |
final gds & signoff results
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
