commit | e0ed8a764cbddf0d9ae96e86eb9fb9cef29d4189 | [log] [tgz] |
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author | zeeshanrafique23 <zeeshanrafique23@gmail.com> | Tue Jun 22 11:54:10 2021 +0500 |
committer | zeeshanrafique23 <zeeshanrafique23@gmail.com> | Tue Jun 22 11:54:10 2021 +0500 |
tree | 045d0134954d2a2ef18f1c3cd935ca8fc7ad75f2 | |
parent | aae4ad13e368e7a9366ee84fd92897e8bd23b8ea [diff] |
added gds file for azadi_soc_dffram with uprjw
Azadi is an SoC with 32-bit RISC-V signal core extented version of ibex we named it as “buraq”, it is a 3-stage pipeline core which implements the RV32IMF instruction set architecture, limited number of peripherals UART, SPI, GPIO, PWM and timer. The parent repository of azadi-soc can be found here.