commit | 6f8ce4dafe5debeda7db3839d3d084cbf57ba517 | [log] [tgz] |
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author | zeeshanrafique23 <zeeshanrafique23@gmail.com> | Tue Jun 22 12:29:46 2021 +0500 |
committer | zeeshanrafique23 <zeeshanrafique23@gmail.com> | Tue Jun 22 12:29:46 2021 +0500 |
tree | 26f95606d1edab4d2fcf3bb29e7484b671e75679 | |
parent | 799de139abbb1d6515fcc3528ad432513bc69dec [diff] |
uploaded azadi-soc with 4KB DFFRAM
Azadi is an SoC with 32-bit RISC-V signal core extented version of ibex we named it as “buraq”, it is a 3-stage pipeline core which implements the RV32IMF instruction set architecture, limited number of peripherals UART, SPI, GPIO, PWM and timer. The parent repository of azadi-soc can be found here.