| commit | a94f5ac30e764833ba2fc74de454ea68448d8dce | [log] [tgz] |
|---|---|---|
| author | S Skandha Deepsita <skandha.deepsita5@gmail.com> | Mon Jun 21 03:46:51 2021 +0530 |
| committer | GitHub <noreply@github.com> | Mon Jun 21 03:46:51 2021 +0530 |
| tree | 894072f00b41450c32658edad4de775b27d9e463 | |
| parent | 8cfbd804208c244b0a6fa56769cf5297359831fb [diff] |
Update info.yaml
diff --git a/info.yaml b/info.yaml index 6b9b27b..e207f5e 100644 --- a/info.yaml +++ b/info.yaml
@@ -13,7 +13,7 @@ - "Open MPW" - "Test Harness" category: "Test Harness" - top_level_netlist: "caravel/verilog/gl/caravan.v" - user_level_netlist: ""verilog/rtl/user_analog_project_wrapper.v" + top_level_netlist: "verilog/gl/caravan.v" + user_level_netlist: "verilog/rtl/user_analog_project_wrapper.v" version: "1.00" cover_image: "Postlayout/Pictures/10bitdac layout desing.PNG "