| commit | 830de90de11d80b436a0f0d2ece1bc5b3a0288fa | [log] [tgz] |
|---|---|---|
| author | S Skandha Deepsita <skandha.deepsita5@gmail.com> | Fri Jun 25 01:23:33 2021 +0530 |
| committer | GitHub <noreply@github.com> | Fri Jun 25 01:23:33 2021 +0530 |
| tree | 59f20b1313ced692a90c1b12522f91d9843cb4b8 | |
| parent | 5eebf2d606a3ac71341fe3dc0780f2388a8b7e8f [diff] |
Update info.yaml
diff --git a/info.yaml b/info.yaml index e207f5e..613ed24 100644 --- a/info.yaml +++ b/info.yaml
@@ -13,7 +13,7 @@ - "Open MPW" - "Test Harness" category: "Test Harness" - top_level_netlist: "verilog/gl/caravan.v" + top_level_netlist: "verilog/gl/caravel.v" user_level_netlist: "verilog/rtl/user_analog_project_wrapper.v" version: "1.00" cover_image: "Postlayout/Pictures/10bitdac layout desing.PNG "