| commit | 47c798e2c8e15d9346cf880fa7a1f0598fa0b93c | [log] [tgz] |
|---|---|---|
| author | Shalini24Kanna <73480418+Shalini24Kanna@users.noreply.github.com> | Tue Jul 06 10:48:50 2021 -0700 |
| committer | GitHub <noreply@github.com> | Tue Jul 06 10:48:50 2021 -0700 |
| tree | 834d4a21cf8861eae6ae44f7c1f6d65093c3f5c6 | |
| parent | 5681f5891a6b9717f7903a5b6ffec2092a4d15fc [diff] |
Update README.md
diff --git a/README.md b/README.md index 4711481..fc4fc19 100644 --- a/README.md +++ b/README.md
@@ -404,7 +404,7 @@ ## 8.Future Works -Layout simulation of 10Bit Potentiometer DAC and plotting INL & DNL for 10Bit DAC layout. Runtime for layout can be reduced further. +Runtime for layout can be reduced further. ## 9.Contributors