| commit | 5ae71db76f4ff07aa6b865944197ab67d97fd00e | [log] [tgz] |
|---|---|---|
| author | AmoghLonkar <alonkar@ucsc.edu> | Thu Jun 10 12:53:43 2021 -0700 |
| committer | AmoghLonkar <alonkar@ucsc.edu> | Thu Jun 10 12:53:43 2021 -0700 |
| tree | bc3246a99e1e1c0fef680c0743f39d0c4595ee82 | |
| parent | d6f65a9fd9eb3141312d62a8a407ecd5c804ac6d [diff] |
Proper timing for single cycle input transfer
| :exclamation: Important Note |
|---|
Refer to README for this sample project documentation.