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foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-002
/
slot-009
/
937732718d3174d1b03e70fcb6531843209df05d
commit
937732718d3174d1b03e70fcb6531843209df05d
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log
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tgz
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author
AmoghLonkar <alonkar@ucsc.edu>
Fri Jun 18 12:07:33 2021 -0700
committer
AmoghLonkar <alonkar@ucsc.edu>
Fri Jun 18 12:07:33 2021 -0700
tree
fb380e523cd0a440557d48b06c035ff47e85a44a
parent
71dedcda544349449f10903ab83f61c18c1c8320
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diff
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Adding makefile
verilog/dv/gpio_test/Makefile
[Added -
diff
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1 file changed
tree: fb380e523cd0a440557d48b06c035ff47e85a44a
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
signoff/
single_port/
spi/
verilog/
caravel
.gitignore
.gitmodules
info.yaml
LICENSE
Makefile
README.md
README.md
Caravel User Project
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Please fill in your project documentation in this README.md file
Refer to
README
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