Google Git
Sign in
foss-eda-tools/third_party/shuttle/sky130/mpw-002/slot-009/3a93f378ca1b51d4c4fc0e123778e6b85985b2bd/./verilog/rtl
tree: 935a01afc49a3b89dc2a7592bd29294756970607 [path history] [tgz]
  1. openram_defines.v
  2. openram_testchip.v
  3. openram_testchip_gpio_tb.v
  4. openram_testchip_la_tb.v
  5. sky130_sram_1kbyte_1rw1r_32x256_8.v
  6. sky130_sram_1kbyte_1rw1r_8x1024_8.v
  7. sky130_sram_2kbyte_1rw1r_32x512_8.v
  8. sky130_sram_4kbyte_1rw1r_32x1024_8.v
  9. sky130_sram_8kbyte_1rw1r_32x2048_8.v
  10. sram_1rw0r0w_32_1024_sky130.v
  11. sram_1rw0r0w_32_256_sky130.v
  12. sram_1rw0r0w_32_512_sky130.v
  13. sram_1rw0r0w_64_512_sky130.v
  14. uprj_netlists.v
  15. user_proj_example.v
  16. user_project_wrapper.v