Don't check supply connectivity. Resolve multiple pin regex warning.

diff --git a/openlane/openram_testchip/config.tcl b/openlane/openram_testchip/config.tcl
index ab3d61e..1e74a48 100644
--- a/openlane/openram_testchip/config.tcl
+++ b/openlane/openram_testchip/config.tcl

@@ -6,11 +6,12 @@
 set ::env(FP_PDN_CORE_RING) 0
 set ::env(GLB_RT_MAXLAYER) 5
 
-set ::env(VERILOG_FILES) "$script_dir/../../verilog/rtl/openram_testchip.v"
+set ::env(VERILOG_FILES) "$script_dir/../../verilog/rtl/openram_defines.v \
+			 $script_dir/../../verilog/rtl/openram_testchip.v"
 #set ::env(BASE_SDC_FILE) "$script_dir/clks.sdc"
 
-set ::env(CLOCK_PORT) "la_clk"
-set ::env(CLOCK_NET) "clk"
+set ::env(CLOCK_PORT) "clk"
+set ::env(CLOCK_NET) "clk sram_clk"
 set ::env(CLOCK_PERIOD) "10"
 
 set ::env(FP_SIZING) absolute
@@ -27,5 +28,8 @@
 set ::env(RUN_KLAYOUT_DRC) 0
 set ::env(PL_TARGET_DENSITY) 0.40
 
+# This doesn't check for supply connectivity:
+set ::env(FP_PDN_CHECK_NODES) 0
+
 # If you're going to use multiple power domains, then keep this disabled.
 set ::env(RUN_CVC) 0

diff --git a/openlane/openram_testchip/pin_order.cfg b/openlane/openram_testchip/pin_order.cfg
index bbd4cba..2031dcb 100644
--- a/openlane/openram_testchip/pin_order.cfg
+++ b/openlane/openram_testchip/pin_order.cfg

@@ -9,38 +9,38 @@
 
 #E
 sram0_clk
-sram0.*
+sram0_data[0-1]
 sram1_clk
-sram1.*
+sram1_data[0-1]
 sram2_clk
-sram2.*
+sram2_data[0-1]
 sram3_clk
-sram3.*
-right.*
+sram3_data[0-1]
+right_data[0-1]
 sram4_clk
-sram4.*
+sram4_data[0-1]
 sram5_clk
-sram5.*
+sram5_data[0-1]
 sram6_clk
-sram6.*
+sram6_data[0-1]
 sram7_clk
-sram7.*
+sram7_data[0-1]
 
 #WR
 sram8_clk
-sram8.*
+sram8_data[0-1]
 sram9_clk
-sram9.*
+sram9_data[0-1]
 sram10_clk
-sram10.*
+sram10_data[0-1]
 sram11_clk
-sram11.*
-left.*
+sram11_data[0-1]
+left_data[0-1]
 sram12_clk
-sram12.*
+sram12_data[0-1]
 sram13_clk
-sram13.*
+sram13_data[0-1]
 sram14_clk
-sram14.*
+sram14_data[0-1]
 sram15_clk
-sram15.*
\ No newline at end of file
+sram15_data[0-1]
\ No newline at end of file