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foss-eda-tools / third_party / shuttle / sky130 / mpw-002 / slot-006 / 55c9fffddc8a42dcb2dc5829e32ef5c093bf535d / verilog
  1. 9b861b2 Add pattern to dv Makefile and drop obselete openlane wrapper dir by manarabdelaty · 3 years, 10 months ago
  2. a26abdd Redid the layout for the example analog project based on the updated by Tim Edwards · 3 years, 10 months ago
  3. a44a60b Preliminary work on the analog user project example. Added verilog RTL and by Tim Edwards · 3 years, 11 months ago
  4. 6af7408 Initial commit by manarabdelaty · 3 years, 11 months ago