commit | fe9c3bb707a0e10e9b31adc0352bce2ffaa494cb | [log] [tgz] |
---|---|---|
author | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Thu Nov 26 15:29:48 2020 +0200 |
committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Thu Nov 26 15:29:48 2020 +0200 |
tree | 84831d02cbdd4cdc71e78b8eb95615b561fc2fde | |
parent | fc7bd3c590405bdcde63957db5babf452e4d7866 [diff] |
Add two more missing USE_POWER_PINS guards
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
Start by cloning the repo and uncompressing the files.
git clone https://github.com/efabless/caravel.git cd caravel make uncompress
Then, you can learn more about the caravel chip by watching these video:
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: