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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-039 / 29b0d93ed50dab52e821804e37d8bb35a2e2bab9
commit29b0d93ed50dab52e821804e37d8bb35a2e2bab9[log] [tgz]
authorGanesh Gore <goreganesh007@gmail.com>Wed Feb 10 23:39:06 2021 -0700
committerGanesh Gore <goreganesh007@gmail.com>Wed Feb 10 23:39:06 2021 -0700
tree5496e43f5b2ab24b851293f181138dbf79b431ca
parent52b2c4f5da4276b848ea09d6437e7675394319c2 [diff]
[DRCFix] Swpapped filer cells with decap cells
3 files changed
tree: 5496e43f5b2ab24b851293f181138dbf79b431ca
  1. checks/
  2. def/
  3. doc/
  4. gds/
  5. lef/
  6. macros/
  7. mag/
  8. maglef/
  9. ngspice/
  10. OpenFPGA_task/
  11. openlane/
  12. qflow/
  13. scripts/
  14. spi/
  15. utils/
  16. verilog/
  17. info.yaml
  18. LICENSE
  19. Makefile
  20. mpw-one-b.md
  21. README.md
  22. source_commit_hash.txt
README.md

Caravel-QLSOFA-HD

Highlights

  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library + and Custom Transmission Gate Cells
  • Base K4 architecture from VPR with 60 vertical and horizontal channels
  • Soft adder implementation
  • Designed using commercial PnR tool

Contribution

NOTE

  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel