| commit | 16fa2bad59c0c34cc8d7f447214325947b9ca9b0 | [log] [tgz] |
|---|---|---|
| author | agorararmard <aagouhar@efabless.com> | Fri Nov 13 18:17:13 2020 +0200 |
| committer | agorararmard <aagouhar@efabless.com> | Fri Nov 13 18:17:13 2020 +0200 |
| tree | f50ff489fcc67c3df531ef133f75db960c2c02cf | |
| parent | 297a6cf744eb88032842cf33614572a1dce9bd5d [diff] [blame] |
info.yml fix
diff --git a/info.yaml b/info.yaml index 9c71392..685ee5e 100644 --- a/info.yaml +++ b/info.yaml
@@ -12,7 +12,7 @@ - "Open MPW" - "Test Harness" category: "Test Harness" - top_level_netlist: "verilog/rtl/caravel.v" - user_level_netlist: "verilog/rtl/user_proj_wrapper.v" + top_level_netlist: "verilog/gl/caravel.v" + user_level_netlist: "verilog/gl/user_project_wrapper.v" version: "1.00" cover_image: "doc/ciic_harness.png"