1. 923a4fe [DATA] LVS clean chip_io & messy routed caravel by Ahmed Ghazy · 3 years, 5 months ago
  2. 475eb36 Update caravel configs for singal routing by Ahmed Ghazy · 3 years, 5 months ago
  3. a997ad9 Update chip_io configs of the LVS clean padframe by Ahmed Ghazy · 3 years, 5 months ago
  4. c0cd7c2 Moved the simple_por ngspice simulations into directory ngspice/simple_por/. by Tim Edwards · 3 years, 5 months ago
  5. 99dbc24 a basic CI setup using the precheck by agorararmard · 3 years, 5 months ago
  6. bc03551 Split the high voltage part of the mgmt_protect.v module into its own by Tim Edwards · 3 years, 5 months ago
  7. 1feaa10 Finished implementation of the simple_por Power-on-reset circuit. Completed DRC and LVS, by Tim Edwards · 3 years, 5 months ago
  8. 963a343 Revised the POR layout, which includes making use of the updated parameterized by Tim Edwards · 3 years, 5 months ago
  9. 0ede187 Merge pull request #6 from dan-rodrigues/tb-fixes by R. Timothy Edwards · 3 years, 5 months ago
  10. c2f0867 Revert platform specific changes by Dan Rodrigues · 3 years, 5 months ago
  11. 4ce2d70 Testbench and Makefile fixes to get sims running by Dan Rodrigues · 3 years, 5 months ago
  12. 4f6036f Did most of the floorplanning work on the POR circuit; only needs routing. by Tim Edwards · 3 years, 5 months ago
  13. 1070832 Added ngspice netlist and testbenches for the power-on-reset circuit. by Tim Edwards · 3 years, 5 months ago
  14. e4c7ec5 Update Makefile to aggressively compress files by Ahmed Ghazy · 3 years, 5 months ago
  15. 4518c62 Corrected the logic in mgmt_protect; also corrected a problem in the la_test2 by Tim Edwards · 3 years, 5 months ago
  16. 43e5c60 Corrections to the management protection buffer block, and a couple of corrections by Tim Edwards · 3 years, 6 months ago
  17. 24c2085 Updates to the Makefiles for easier passing of user-specific variables, by Tim Edwards · 3 years, 6 months ago
  18. 581068f Corrected the mess caused by introducing default_nettype none into the design by Tim Edwards · 3 years, 6 months ago
  19. ba6ee81 Update caravel.gds.gz with the right user project by Ahmed Ghazy · 3 years, 6 months ago
  20. ec81bd2 Update openlane configs by Ahmed Ghazy · 3 years, 6 months ago
  21. efdc529 Add default target to "load" user design on caravel by Ahmed Ghazy · 3 years, 6 months ago
  22. 10b5b0c [DATA] Push updated views as per the latest pad frame dimensions by Ahmed Ghazy · 3 years, 6 months ago
  23. 09a7237 update DFFRAM config to include DFFRAMBB.v by agorararmard · 3 years, 6 months ago
  24. 64c17e8 Add missing USE_POWER_PINS in other modules by Ahmed Ghazy · 3 years, 6 months ago
  25. 69663c7 Eliminate the two inverters at the top level by Ahmed Ghazy · 3 years, 6 months ago
  26. 630d123 Updated Carvel Architectural diagram by Mohamed Shalan · 3 years, 6 months ago
  27. 549fd51 Delete ciic_harness.png by Mohamed Shalan · 3 years, 6 months ago
  28. 0270b03 Add files via upload by Mohamed Shalan · 3 years, 6 months ago
  29. f1d5472 Delete ciic_harness.png by Mohamed Shalan · 3 years, 6 months ago
  30. 11e6d4e Updated the harness diagram by Mohamed Shalan · 3 years, 6 months ago
  31. 8baf4a0 Delete ciic_harness.png by Mohamed Shalan · 3 years, 6 months ago
  32. 4f75616 Update README.md by Mohamed Shalan · 3 years, 6 months ago
  33. 312ff95 switch to rtl in info.yaml until an elaborated netlist is ready. by agorararmard · 3 years, 6 months ago
  34. 2fa4b03 Add caravel floorplan with a preliminary seal ring by Ahmed Ghazy · 3 years, 6 months ago
  35. 4596e5f Merge pull request #2 from mattvenn/release by R. Timothy Edwards · 3 years, 6 months ago
  36. 336e082 add missing signals by Matt Venn · 3 years, 6 months ago
  37. 08cd6eb add default nettype none by Matt Venn · 3 years, 6 months ago
  38. d4cc669 [DATA] Add full runs of almost all blocks by Ahmed Ghazy · 3 years, 6 months ago
  39. 5898e4a Add compress and uncompress Makefile targets by Ahmed Ghazy · 3 years, 6 months ago
  40. 16fa2ba info.yml fix by agorararmard · 3 years, 6 months ago
  41. 297a6cf Merge pull request #38 from Manarabdelaty/update_custom_mem by R. Timothy Edwards · 3 years, 6 months ago
  42. 8f13179 Updated custom memory by Manar · 3 years, 6 months ago
  43. 7c9cea0 Add sky130_fd_io__top_xres4v2 stub by Ahmed Ghazy · 3 years, 6 months ago
  44. 7215439 Update and add the rest of design configs by Ahmed Ghazy · 3 years, 6 months ago
  45. b41204c Merge pull request #35 from Manarabdelaty/rename_lvs by R. Timothy Edwards · 3 years, 6 months ago
  46. bcc2544 Add a new sram_1rw1r_32_256_8_sky130 wrapper by Ahmed Ghazy · 3 years, 6 months ago
  47. 61dce92 Renamed lvs guard to use_power_pins by Manar · 3 years, 6 months ago
  48. 9eeea83 Update mgmt_core config by Ahmed Ghazy · 3 years, 6 months ago
  49. bc5e215 Merge pull request #34 from Manarabdelaty/update_storage_arch by R. Timothy Edwards · 3 years, 6 months ago
  50. 1159d1a Update DFFRAM config by Ahmed Ghazy · 3 years, 6 months ago
  51. ffe6cad Updated storage area by Manar · 3 years, 6 months ago
  52. e5ac00f Merge pull request #33 from Manarabdelaty/custom_mem by R. Timothy Edwards · 3 years, 6 months ago
  53. 50b0ea0 Merge pull request #32 from dan-rodrigues/user_proj_wb_ack by R. Timothy Edwards · 3 years, 6 months ago
  54. c3b9da4 Updated Makefiles to have lvs defined to use the power pins by Manar · 3 years, 6 months ago
  55. 68e0363 Added power pins to the custom memory cells by Manar · 3 years, 6 months ago
  56. 2517fa8 Add USE_CUSTOM_DFFRAM guard by Ahmed Ghazy · 3 years, 6 months ago
  57. b9a8c91 user_proj_example: fix wbs_ack_o wiring by Dan Rodrigues · 3 years, 6 months ago
  58. a4f9b52 Update info.yaml by Jeff DiCorpo · 3 years, 6 months ago
  59. b2fe178 Create info.yaml by Jeff DiCorpo · 3 years, 6 months ago
  60. 5586f1b Add the custom DFF RAM by Ahmed Ghazy · 3 years, 6 months ago
  61. 58cca1b Merge pull request #31 from agorararmard/mkk-scripts by R. Timothy Edwards · 3 years, 6 months ago
  62. f744e2e Update openlane configs and Makefile by Ahmed Ghazy · 3 years, 6 months ago
  63. 2170449 Added chip_io.spice under spi/lvs by Ahmed Ghazy · 3 years, 6 months ago
  64. 8e343f6 call instructions consistent with script names by agorararmard · 3 years, 6 months ago
  65. 1b0190a just a typo by agorararmard · 3 years, 6 months ago
  66. 1a1e89a dump xor scripts by agorararmard · 3 years, 6 months ago
  67. 3661905 ext scripts by agorararmard · 3 years, 6 months ago
  68. 85a8aea re-structuring of scripts by agorararmard · 3 years, 6 months ago
  69. 2ffcf3b another go at other types by agorararmard · 3 years, 6 months ago
  70. 80d3fef init gds version by agorararmard · 3 years, 6 months ago
  71. c2ed4ec added imagaes of the work in progress on caravel by Mohamed Kassem · 3 years, 6 months ago
  72. 2c852fb Merge pull request #30 from Manarabdelaty/wb_mprj_port by R. Timothy Edwards · 3 years, 6 months ago
  73. db745b7 Updated openlane configs for mgmt_core and digital_pll by Ahmed Ghazy · 3 years, 6 months ago
  74. cd4cff7 Connected WB MI A port outputs to the wb bus by Manar · 3 years, 6 months ago
  75. f8e6154 Merge pull request #29 from Manarabdelaty/param_adr by R. Timothy Edwards · 3 years, 6 months ago
  76. 6bedda9 Added localparam for calculating mem address bits by Manar · 3 years, 6 months ago
  77. 263b891 Merge pull request #28 from Manarabdelaty/incr_user_ram_blocks by R. Timothy Edwards · 3 years, 6 months ago
  78. db08adb Updated default number of sram blocks for the user area by Manar · 3 years, 6 months ago
  79. cd41a1d Merge pull request #27 from ax3ghazy/conflict_warnings_fix by R. Timothy Edwards · 3 years, 6 months ago
  80. 706c312 Reset iomem_ready to 0 only in one block by Ahmed Ghazy · 3 years, 6 months ago
  81. f46273f Fix for the synthesis warnings about iomem_rdata by Ahmed Ghazy · 3 years, 6 months ago
  82. 7761f89 Merge pull request #26 from Manarabdelaty/add_ext_storage by R. Timothy Edwards · 3 years, 6 months ago
  83. 55ec369 Connected storage area to mgmt_core by Manar · 3 years, 6 months ago
  84. 0cefb93 Seperated mgmt and user storage blocks base addresses by Manar · 3 years, 6 months ago
  85. 14f7ca0 Added storage area standalone rtl by Manar · 3 years, 6 months ago
  86. ec9b536 Removed storage area from mgmt_core by Manar · 3 years, 6 months ago
  87. d01c637 Modified the mprj_ctrl.v verilog to be completely clear about how by Tim Edwards · 3 years, 6 months ago
  88. 22d29d6 Add a global defines.v and rely less on parameters by Ahmed Ghazy · 3 years, 6 months ago
  89. 3a1e353 Fix another 36->37 typo in mem_tb.v by Ahmed Ghazy · 3 years, 6 months ago
  90. cfe7653 Corrected the timer testbenches for minor count differences due to by Tim Edwards · 3 years, 6 months ago
  91. 7a3f478 added ./scripts folder with misc purposes. THIS IS WORK IN PROGRESS by Mohamed Kassem · 3 years, 6 months ago
  92. 0445c08 Revised the mprj_ctrl module verilog so that it does not generate by Tim Edwards · 3 years, 6 months ago
  93. ba32890 Revised the mprj_ctrl to treat the power control as a single bit by Tim Edwards · 3 years, 6 months ago
  94. e6eda80 Fix a typo in a previous fix... by Ahmed Ghazy · 3 years, 6 months ago
  95. 0b6219d Fix to an issue with index arithmetic by Ahmed Ghazy · 3 years, 6 months ago
  96. 496a08a Corrected an issue with the JTAG and SDO pins that prevented them from by Tim Edwards · 3 years, 6 months ago
  97. e1b1f17 Add more openlane configs by Ahmed Ghazy · 3 years, 6 months ago
  98. 72e52c6 Added what can be pushed of chip_io by Ahmed Ghazy · 3 years, 6 months ago
  99. 6b6803f Add a sample user project wrapper by Ahmed Ghazy · 3 years, 6 months ago
  100. 7be29a2 Made a number of modifications to the counter-timer to correctly pipeline by Tim Edwards · 3 years, 6 months ago