Sign in
foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-001
/
slot-032
/
62fb70f1ffdae51fa057347f6ad823633bc013a3
commit
62fb70f1ffdae51fa057347f6ad823633bc013a3
[
log
]
[
tgz
]
author
manarabdelaty <manarabdelatty@aucegypt.edu>
Mon Dec 28 21:27:13 2020 +0200
committer
manarabdelaty <manarabdelatty@aucegypt.edu>
Mon Dec 28 21:39:16 2020 +0200
tree
cd6b24dee0dd082f0336d3128729e770fb112b65
parent
e88affe28790cd629b3931541fdb30ee64046d45
[
diff
]
Updated N5 TB and verilog views
verilog/dv/caravel/user_proj_example/io_ports/io_ports_tb.v
[
diff
]
verilog/dv/caravel/user_proj_example/sw_n5/test.c
[
diff
]
verilog/gl/user_project/gl/DFFRAM.v
[
diff
]
verilog/rtl/user_project/AHB_sys_0/APB_sys_0/APB_sys_0.v
[
diff
]
verilog/rtl/user_project/IPs/RAM_3Kx32.v
[
diff
]
verilog/rtl/user_project/acc/AHB_SPM.v
[
diff
]
verilog/rtl/user_project/soc_core.v
[
diff
]
verilog/rtl/user_project/user_project_wrapper.v
[
diff
]
verilog/rtl/user_project_wrapper.v
[
diff
]
9 files changed
tree: cd6b24dee0dd082f0336d3128729e770fb112b65
.travisCI/
def/
doc/
gds/
lef/
macros/
mag/
maglef/
ngspice/
openlane/
qflow/
scripts/
spi/
utils/
verilog/
.travis.yml
info.yaml
LICENSE
Makefile
mpw-one-b.md
README.md
README.md
Caravel_N5_SoC