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foss-eda-tools
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mpw-001
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slot-026
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01e7303068f6c8810c4096e57d1e148bee71a6e9
commit
01e7303068f6c8810c4096e57d1e148bee71a6e9
[
log
]
author
Anton Blanchard <anton@linux.ibm.com>
Mon Feb 01 22:42:16 2021 +1100
committer
Anton Blanchard <anton@ozlabs.org>
Mon Feb 01 22:42:16 2021 +1100
tree
542c65665cf5544744d67b25aa4dce5598885f11
parent
195158b0c071df817899f8ea8b24e4ef4c6b0e50
[
diff
]
Add fake diode model for gate level simulation
verilog/rtl/caravel_netlists.v
[
diff
]
1 file changed
tree: 542c65665cf5544744d67b25aa4dce5598885f11
.travisCI/
def/
docs/
gds/
lef/
macros/
mag/
maglef/
ngspice/
openlane/
qflow/
scripts/
signoff/
spi/
utils/
verilog/
.gitignore
.readthedocs.yml
.travis.yml
info.yaml
LICENSE
Makefile
manifest
README.rst
README.src.rst