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227d8056e8d5774ca209efba08133480bb5b418f
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verilog
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dv
tree: fd65f1e1bd4f207acc9a02d8151f79de4e2d182f
caravel/
wb_utests/
dummy_slave.v
README.md
verilog/dv/README.md
DV Tests
Organized into two subdirectories:
caravel: contains tests for both the mangement SoC and an example user project.
wb_utests: contains unit tests for the wishbone components residing at the management SoC private bus