Made a change to all of the testbench Makefiles to define PDK_PATH as the
root of the PDK, and pass this to iverilog with the -I option. This lets
the PDK location be passed to "make" when the testbench is run, and lets
the top-level verilog not contain absolute paths to the PDK. Also:
replaced the s8iom0s8.v with sky130_fd_io.v, which is currently just a
hack since the pad names have not changed; I have just copied my I/O
library file to the new location and file name.
diff --git a/verilog/dv/caravel/mgmt_soc/gpio/Makefile b/verilog/dv/caravel/mgmt_soc/gpio/Makefile
index dd34c59..fcbea22 100644
--- a/verilog/dv/caravel/mgmt_soc/gpio/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/gpio/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/hkspi/Makefile b/verilog/dv/caravel/mgmt_soc/hkspi/Makefile
index b3930e2..d8652ee 100644
--- a/verilog/dv/caravel/mgmt_soc/hkspi/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/hkspi/Makefile
@@ -5,6 +5,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -15,7 +16,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/mem/Makefile b/verilog/dv/caravel/mgmt_soc/mem/Makefile
index 02e036b..3d72290 100644
--- a/verilog/dv/caravel/mgmt_soc/mem/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/mem/Makefile
@@ -5,6 +5,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -15,7 +16,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/mprj_ctrl/Makefile b/verilog/dv/caravel/mgmt_soc/mprj_ctrl/Makefile
index c69bb9f..aba8479 100644
--- a/verilog/dv/caravel/mgmt_soc/mprj_ctrl/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/mprj_ctrl/Makefile
@@ -5,6 +5,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -15,7 +16,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/pass_thru/Makefile b/verilog/dv/caravel/mgmt_soc/pass_thru/Makefile
index 32d51ce..2e0eae5 100644
--- a/verilog/dv/caravel/mgmt_soc/pass_thru/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/pass_thru/Makefile
@@ -5,6 +5,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -15,7 +16,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/perf/Makefile b/verilog/dv/caravel/mgmt_soc/perf/Makefile
index 00c9aee..1c36a58 100644
--- a/verilog/dv/caravel/mgmt_soc/perf/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/perf/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/pll/Makefile b/verilog/dv/caravel/mgmt_soc/pll/Makefile
index e5215e6..2698fc1 100644
--- a/verilog/dv/caravel/mgmt_soc/pll/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/pll/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(PDK_PATH) -I $(BEHAVIOURAL_MODELS) \
+ -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/sysctrl/Makefile b/verilog/dv/caravel/mgmt_soc/sysctrl/Makefile
index 28c604b..9dd652f 100644
--- a/verilog/dv/caravel/mgmt_soc/sysctrl/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/sysctrl/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/timer/Makefile b/verilog/dv/caravel/mgmt_soc/timer/Makefile
index a7a81eb..ea70d00 100644
--- a/verilog/dv/caravel/mgmt_soc/timer/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/timer/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/timer2/Makefile b/verilog/dv/caravel/mgmt_soc/timer2/Makefile
index 6f00a38..5081080 100644
--- a/verilog/dv/caravel/mgmt_soc/timer2/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/timer2/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/mgmt_soc/uart/Makefile b/verilog/dv/caravel/mgmt_soc/uart/Makefile
index 0957ab9..ea6a44f 100644
--- a/verilog/dv/caravel/mgmt_soc/uart/Makefile
+++ b/verilog/dv/caravel/mgmt_soc/uart/Makefile
@@ -5,6 +5,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -15,7 +16,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/user_proj_example/io_ports/Makefile b/verilog/dv/caravel/user_proj_example/io_ports/Makefile
index 9d88da8..e07c74a 100644
--- a/verilog/dv/caravel/user_proj_example/io_ports/Makefile
+++ b/verilog/dv/caravel/user_proj_example/io_ports/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/user_proj_example/la_test1/Makefile b/verilog/dv/caravel/user_proj_example/la_test1/Makefile
index f24cdc3..9a2dfc7 100644
--- a/verilog/dv/caravel/user_proj_example/la_test1/Makefile
+++ b/verilog/dv/caravel/user_proj_example/la_test1/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/dv/caravel/user_proj_example/la_test2/Makefile b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
index 4304750..2519aa0 100644
--- a/verilog/dv/caravel/user_proj_example/la_test2/Makefile
+++ b/verilog/dv/caravel/user_proj_example/la_test2/Makefile
@@ -4,6 +4,7 @@
BEHAVIOURAL_MODELS = ../../
GCC_PATH=/ef/apps/bin
+PDK_PATH=/ef/tech/SW/sky130A
.SUFFIXES:
@@ -14,7 +15,8 @@
hex: ${PATTERN:=.hex}
%.vvp: %_tb.v %.hex
- iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS)-I $(IP_PATH) -I $(RTL_PATH) \
+ iverilog -DFUNCTIONAL -I $(BEHAVIOURAL_MODELS) \
+ -I $(PDK_PATH) -I $(IP_PATH) -I $(RTL_PATH) \
$< -o $@
%.vcd: %.vvp
diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v
index 79830be..3c711fd 100644
--- a/verilog/rtl/caravel.v
+++ b/verilog/rtl/caravel.v
@@ -22,21 +22,15 @@
`include "pads.v"
-/* To be removed when sky130_fd_io is available */
-// `include "/ef/tech/SW/EFS8A/libs.ref/verilog/s8iom0s8/s8iom0s8.v"
-// `include "/ef/tech/SW/EFS8A/libs.ref/verilog/s8iom0s8/power_pads_lib.v"
-// `include "/ef/tech/SW/sky130A/libs.ref/verilog/sky130_fd_sc_hd/sky130_fd_sc_hd.v"
-// `include "/ef/tech/SW/sky130A/libs.ref/verilog/sky130_fd_sc_hvl/sky130_fd_sc_hvl.v"
+/* NOTE: Need to pass the PDK root directory to iverilog with option -I */
-/* Local only, please remove */
-// `include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_io/verilog/sky130_fd_io.v"
-// `include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_io/verilog/power_pads_lib.v"
-`include "/home/tim/projects/efabless/tech/SW/EFS8A/libs.ref/s8iom0s8/verilog/s8iom0s8.v"
-// `include "/home/tim/projects/efabless/tech/SW/EFS8A/libs.ref/s8iom0s8/verilog/power_pads_lib.v"
-`include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hd/verilog/primitives.v"
-`include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v"
-`include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/verilog/primitives.v"
-`include "/home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/verilog/sky130_fd_sc_hvl.v"
+`include "libs.ref/sky130_fd_io/verilog/sky130_fd_io.v"
+// `include "libs.ref/sky130_fd_io/verilog/power_pads_lib.v"
+
+`include "libs.ref/sky130_fd_sc_hd/verilog/primitives.v"
+`include "libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v"
+`include "libs.ref/sky130_fd_sc_hvl/verilog/primitives.v"
+`include "libs.ref/sky130_fd_sc_hvl/verilog/sky130_fd_sc_hvl.v"
`include "mgmt_soc.v"
`include "housekeeping_spi.v"
