add default nettype none
diff --git a/verilog/rtl/simpleuart.v b/verilog/rtl/simpleuart.v
index 54a3cb4..62a3ea6 100644
--- a/verilog/rtl/simpleuart.v
+++ b/verilog/rtl/simpleuart.v
@@ -1,3 +1,4 @@
+`default_nettype none
 /*
  *  PicoSoC - A simple example SoC using PicoRV32
  *