commit | ea5b3ab263d01f5afe0e2510d7558685f5b0ae5e | [log] [tgz] |
---|---|---|
author | Jeff DiCorpo <jeffdi@efabless.com> | Fri Feb 19 02:40:54 2021 -0800 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Fri Feb 19 02:40:54 2021 -0800 |
tree | 65406155cbf53c298e71dedee00f8c7a9c50d288 | |
parent | 91ad14dfdf86da38bc386ae472c0a6a2ce1e3cb1 [diff] |
final gds & drc results
In order to get the caravel_fulgor_opamp project running several tools and files need to be installed. To simplify the installation and to make sure you fullfill all the pre-requisites an install_pdk.sh script is provided. To run the script just type on the console:
./install_pdk.sh
This script does the following:
This project is a test chip, which contains several two stages operationals amplifiers with Miller compensation. This is an all analog desing implemented on the Google-Skywater 130nm Open Source PDK. It is an Open Source project underApache License 2.0.
The OpAmp desing is located in an Open Source SoC Harness obtained from the efabless Caravel Project.
To run xschem and be able to simulate the OpAmp's test benches the following commands need to be run:
cd caravel_fulgor_opamp/xschem xschem
In the xschem folder it is found the xschemrc file, where the paths to the xschem libraries are defined.
To run magic and be able to edit or desing a layout the following commands need to be run:
cd caravel_fulgor_opamp magic -rcfile mag/dh.magicrc
The dh.magicrc file specifies where the open_pdk layout libraries are located. If magic is used without the -rcfile specification, the sky130 library won't be loaded.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: