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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-019 / a4f9b52d71dbb86678d0743e25b8229126b5da64
commita4f9b52d71dbb86678d0743e25b8229126b5da64[log] [tgz]
authorJeff DiCorpo <42048757+jeffdi@users.noreply.github.com>Sat Nov 07 10:10:40 2020 -0800
committerGitHub <noreply@github.com>Sat Nov 07 10:10:40 2020 -0800
tree81a267176835a10732d44286a783cd9fd6c602e5
parentb2fe17852bb2c4237bf5a1355911a1f146ba3816 [diff]
Update info.yaml
1 file changed
tree: 81a267176835a10732d44286a783cd9fd6c602e5
  1. def/
  2. doc/
  3. gds/
  4. lef/
  5. macros/
  6. mag/
  7. openlane/
  8. scripts/
  9. spi/
  10. verilog/
  11. info.yaml
  12. LICENSE
  13. README.md
README.md

CIIC Harness

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware that can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)

Mega Project Area

This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.