| commit | 312ff95eaf1fe1597875eebaa1bd06c7f6e8a7c6 | [log] [tgz] |
|---|---|---|
| author | agorararmard <aagouhar@efabless.com> | Tue Nov 17 23:38:23 2020 +0200 |
| committer | agorararmard <aagouhar@efabless.com> | Tue Nov 17 23:38:23 2020 +0200 |
| tree | 01edf04cf2a1eaba9e30e0f1d6fb2f747b894fd1 | |
| parent | 2fa4b0335a421462bcb599f11113ca786f130d91 [diff] |
switch to rtl in info.yaml until an elaborated netlist is ready.
diff --git a/info.yaml b/info.yaml index 685ee5e..ffd0520 100644 --- a/info.yaml +++ b/info.yaml
@@ -12,7 +12,7 @@ - "Open MPW" - "Test Harness" category: "Test Harness" - top_level_netlist: "verilog/gl/caravel.v" + top_level_netlist: "verilog/rtl/caravel.v" user_level_netlist: "verilog/gl/user_project_wrapper.v" version: "1.00" cover_image: "doc/ciic_harness.png"