Google Git
Sign in
foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-018 / 6f304ba324062a1d994cbc325483e187d35a6f4e / verilog / rtl / simpleuart.v
  1. 581068f Corrected the mess caused by introducing default_nettype none into the design by Tim Edwards · 4 years, 5 months ago
  2. 336e082 add missing signals by Matt Venn · 4 years, 5 months ago
  3. 08cd6eb add default nettype none by Matt Venn · 4 years, 5 months ago
  4. ca2f318 Various corrections to simplify the user project I/O wiring by Tim Edwards · 4 years, 7 months ago
  5. fd13eb5 initial commit by shalan · 4 years, 8 months ago
  6. cd64af5 Started adding RTL for the Caravel project by Tim Edwards · 4 years, 9 months ago