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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-018 / 49a4ff64997d1bb8f7e5b1b9ab31daa48e8d648e
commit49a4ff64997d1bb8f7e5b1b9ab31daa48e8d648e[log] [tgz]
authorMohamed Kassem <mkkassem@users.noreply.github.com>Wed Oct 14 04:56:27 2020 -0700
committerGitHub <noreply@github.com>Wed Oct 14 04:56:27 2020 -0700
tree2fba748e4e9824f04ac8792c205fa73ae2041526
parent63c933f54c729c5b643e545239014f17ec1c26af [diff]
Fixed broken links for dv examples
1 file changed
tree: 2fba748e4e9824f04ac8792c205fa73ae2041526
  1. doc/
  2. mag/
  3. verilog/
  4. LICENSE
  5. README.md
README.md

CIIC Harness

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)

Mega Project Area

This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.