Corrections to the management protection buffer block, and a couple of corrections
to errors in the testbenchs for io_ports and la_test1.
Applying updates to the management protection block that I made to the release
branch after it was frozen.
diff --git a/verilog/rtl/caravel.v b/verilog/rtl/caravel.v
index 95ca327..3832f67 100644
--- a/verilog/rtl/caravel.v
+++ b/verilog/rtl/caravel.v
@@ -293,12 +293,13 @@
wire [7:0] spi_ro_config_core;
// LA signals
- wire [127:0] la_output_core; // From CPU to MPRJ
- wire [127:0] la_data_in_mprj; // From CPU to MPRJ
+ wire [127:0] la_data_in_user; // From CPU to MPRJ
+ wire [127:0] la_data_in_mprj; // From MPRJ to CPU
wire [127:0] la_data_out_mprj; // From CPU to MPRJ
- wire [127:0] la_output_mprj; // From MPRJ to CPU
- wire [127:0] la_oen; // LA output enable from CPU perspective (active-low)
-
+ wire [127:0] la_data_out_user; // From MPRJ to CPU
+ wire [127:0] la_oen_user; // From CPU to MPRJ
+ wire [127:0] la_oen_mprj; // From CPU to MPRJ
+
// WB MI A (User Project)
wire mprj_cyc_o_core;
wire mprj_stb_o_core;
@@ -386,9 +387,9 @@
.user_clk(caravel_clk2),
.core_rstn(caravel_rstn),
// Logic Analyzer
- .la_input(la_data_out_mprj),
- .la_output(la_output_core),
- .la_oen(la_oen),
+ .la_input(la_data_in_mprj),
+ .la_output(la_data_out_mprj),
+ .la_oen(la_oen_mprj),
// User Project IO Control
.mprj_vcc_pwrgood(mprj_vcc_pwrgood),
.mprj2_vcc_pwrgood(mprj2_vcc_pwrgood),
@@ -452,8 +453,12 @@
.mprj_sel_o_core(mprj_sel_o_core),
.mprj_adr_o_core(mprj_adr_o_core),
.mprj_dat_o_core(mprj_dat_o_core),
- .la_output_core(la_output_core),
- .la_oen(la_oen),
+ .la_data_out_core(la_data_out_user),
+ .la_data_out_mprj(la_data_out_mprj),
+ .la_data_in_core(la_data_in_user),
+ .la_data_in_mprj(la_data_in_mprj),
+ .la_oen_mprj(la_oen_mprj),
+ .la_oen_core(la_oen_user),
.user_clock(mprj_clock),
.user_clock2(mprj_clock2),
@@ -465,7 +470,6 @@
.mprj_sel_o_user(mprj_sel_o_user),
.mprj_adr_o_user(mprj_adr_o_user),
.mprj_dat_o_user(mprj_dat_o_user),
- .la_data_in_mprj(la_data_in_mprj),
.user1_vcc_powergood(mprj_vcc_pwrgood),
.user2_vcc_powergood(mprj2_vcc_pwrgood),
.user1_vdd_powergood(mprj_vdd_pwrgood),
@@ -499,9 +503,9 @@
.wbs_ack_o(mprj_ack_i_core),
.wbs_dat_o(mprj_dat_i_core),
// Logic Analyzer
- .la_data_in(la_data_in_mprj),
- .la_data_out(la_data_out_mprj),
- .la_oen (la_oen),
+ .la_data_in(la_data_in_user),
+ .la_data_out(la_data_out_user),
+ .la_oen(la_oen_user),
// IO Pads
.io_in (user_io_in),
.io_out(user_io_out),
