- 9073946 Removed a small error in the PLL testbench C code. However, the by Tim Edwards · 4 years, 5 months ago
- bb3cd69 Added a behavioral model for the ring oscillator, and a testbench by Tim Edwards · 4 years, 5 months ago
- 8115320 Modified code to let SPI master control the housekeeping SPI through by Tim Edwards · 4 years, 5 months ago
- 856b092 Corrected the counter/timer and made an enhancement to respond to a by Tim Edwards · 4 years, 5 months ago
- b78e1c1 Added management flash SPI pass-through mode testbench and debugged it. by Tim Edwards · 4 years, 5 months ago
- 0c03240 Updated all the testbenches to use the new split power supplies and 37-bit by Tim Edwards · 4 years, 5 months ago
- b3cef09 Removed temporary file. by Tim Edwards · 4 years, 5 months ago
- 5ae07d9 Corrected the error causing the failure of the GPIO testbench. by Tim Edwards · 4 years, 5 months ago
- 9eda80d Split the main power supply into managment and two user areas. Mostly by Tim Edwards · 4 years, 5 months ago
- 0553751 Most testbenches are working again now. Renamed "mprj_counter" to "user_proj_example" by Tim Edwards · 4 years, 5 months ago
- ca2f318 Various corrections to simplify the user project I/O wiring by Tim Edwards · 4 years, 5 months ago
- f51dd08 Added a simple power-on-reset circuit with schmitt trigger output, and by Tim Edwards · 4 years, 5 months ago
- 89f0924 Made corrections; GPIO testbench now passes. by Tim Edwards · 4 years, 5 months ago
- 251e0df Serial chain loading of the I/O configurations is now working. by Tim Edwards · 4 years, 5 months ago
- 44bab47 In spite of many errors that still need fixing, this is a major advance by Tim Edwards · 4 years, 5 months ago
- 61bfc1f Corrected the primary issue with simulation, which was the failure by Tim Edwards · 4 years, 5 months ago
- c18c474 Fixed the syntactical loose ends from yesterday. There are by Tim Edwards · 4 years, 5 months ago
- 04ba17f Vast and substantial changes: Removed the old GPIO control with the new one by Tim Edwards · 4 years, 5 months ago
- 49e2c18 Some minor updates to the testbench Makefiles and verilog. by Tim Edwards · 4 years, 6 months ago
- c5265b8 Corrected some things from the initial pass of removing unused GPIO by Tim Edwards · 4 years, 6 months ago
- ef8312e Caravel 2nd phase (branch phase2): First pass at removing the analog by Tim Edwards · 4 years, 6 months ago
- 12a9a1d Update README.md by Mohamed Shalan · 4 years, 7 months ago
- 49fc489 Update README.md by Mohamed Shalan · 4 years, 7 months ago
- 65a3487 delete not nedded files by shalan · 4 years, 7 months ago
- 0d14e6e harness phase1 initial commit by shalan · 4 years, 7 months ago
- fd13eb5 initial commit by shalan · 4 years, 7 months ago
- cd64af5 Started adding RTL for the Caravel project by Tim Edwards · 4 years, 7 months ago
- 33de054 populated the project with data subfolders. by mkk · 4 years, 8 months ago
- ecdaf58 Initial commit by Mohamed Kassem · 4 years, 8 months ago
