- 49e2c18 Some minor updates to the testbench Makefiles and verilog. by Tim Edwards · 4 years, 6 months ago
- c5265b8 Corrected some things from the initial pass of removing unused GPIO by Tim Edwards · 4 years, 6 months ago
- ef8312e Caravel 2nd phase (branch phase2): First pass at removing the analog by Tim Edwards · 4 years, 6 months ago
- 12a9a1d Update README.md by Mohamed Shalan · 4 years, 7 months ago
- 49fc489 Update README.md by Mohamed Shalan · 4 years, 7 months ago
- 65a3487 delete not nedded files by shalan · 4 years, 7 months ago
- 0d14e6e harness phase1 initial commit by shalan · 4 years, 7 months ago
- fd13eb5 initial commit by shalan · 4 years, 7 months ago
- cd64af5 Started adding RTL for the Caravel project by Tim Edwards · 4 years, 7 months ago
- 33de054 populated the project with data subfolders. by mkk · 4 years, 8 months ago
- ecdaf58 Initial commit by Mohamed Kassem · 4 years, 8 months ago
