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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-017 / refs/heads/main
commitb1cde5bea593da2fd5dbc2433e6519f96d86dc48[log] [tgz]
authorTim 'mithro' Ansell <me@mith.ro>Thu Dec 29 18:45:53 2022 +0000
committerTim 'mithro' Ansell <me@mith.ro>Thu Dec 29 18:45:53 2022 +0000
treee16b5f4ac979a3a0fda94d4bf088c410aef7acc7
parent829a885c7d78d949455a8d138939a6e3862c5334 [diff]
Updating the shuttle_url value in `info.yaml` file.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
1 file changed
tree: e16b5f4ac979a3a0fda94d4bf088c410aef7acc7
  1. def/
  2. docs/
  3. gds/
  4. lef/
  5. macros/
  6. mag/
  7. maglef/
  8. ngspice/
  9. OpenFPGA_task/
  10. openlane/
  11. qflow/
  12. scripts/
  13. signoff/
  14. spi/
  15. utils/
  16. verilog/
  17. doc ⇨ docs
  18. info.yaml
  19. LICENSE
  20. Makefile
  21. Makefile.master
  22. manifest
  23. mpw-one-b.md
  24. README.md
  25. source_commit_hash.txt
README.md

Caravel-SOFA-HD

Highlights

  • Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
  • Designed with Skywater130nm PDK with HD standard cell library
  • Base K4 architecture from VPR with 40 vertical and horizontal channels
  • No adders (carry-chain) or flipflop reset pins
  • Designed using commercial PnR tool

Contribution

NOTE

  • This repository is created for The eFabless Open MPW shuttle program submission
  • The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel