commit: b1cde5bea593da2fd5dbc2433e6519f96d86dc48
[log] [tgz]
author: Tim 'mithro' Ansell <me@mith.ro>
Thu Dec 29 18:45:53 2022 +0000
committer: Tim 'mithro' Ansell <me@mith.ro>
Thu Dec 29 18:45:53 2022 +0000
tree: e16b5f4ac979a3a0fda94d4bf088c410aef7acc7
parent: 829a885c7d78d949455a8d138939a6e3862c5334 [diff]

Updating the shuttle_url value in `info.yaml` file.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>

info.yaml[diff]

1 file changed

tree: e16b5f4ac979a3a0fda94d4bf088c410aef7acc7

README.md

Caravel-SOFA-HD

Highlights

Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
Designed with Skywater130nm PDK with HD standard cell library
Base K4 architecture from VPR with 40 vertical and horizontal channels
No adders (carry-chain) or flipflop reset pins
Designed using commercial PnR tool

Contribution

NOTE

This repository is created for The eFabless Open MPW shuttle program submission
The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel