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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-017 / 963a3439f6e07a720b115d769063577d2290b537
commit963a3439f6e07a720b115d769063577d2290b537[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Sun Nov 22 10:47:50 2020 -0500
committerTim Edwards <tim@opencircuitdesign.com>Sun Nov 22 10:47:50 2020 -0500
tree65fc0b66104bcb8d08ce47a53fb1398c1bdfd27e
parent0ede18758ccc30b373a57f2bc7bec28573f41781 [diff]
Revised the POR layout, which includes making use of the updated parameterized
PDK cells with vias to metal1 included.  This changed the hash name of the
cells and so left behind a number of unreferenced cells, which have been deleted.
8 files changed
tree: 65fc0b66104bcb8d08ce47a53fb1398c1bdfd27e
  1. def/
  2. doc/
  3. gds/
  4. lef/
  5. macros/
  6. mag/
  7. ngspice/
  8. openlane/
  9. scripts/
  10. spi/
  11. verilog/
  12. info.yaml
  13. LICENSE
  14. Makefile
  15. README.md
README.md

CIIC Harness

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware that can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC can be found here

Mega Project Area

This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.