commit: 8472f26f6d0a02c72fb265c22f93b8795647dd27
[log]
author: Ganesh Gore <goreganesh007@gmail.com>
Mon Dec 14 14:35:03 2020 -0700
committer: Ganesh Gore <goreganesh007@gmail.com>
Mon Dec 14 14:35:03 2020 -0700
tree: 599407a4e504c52bae9c987e01775f04974ddaf3
parent: 27a22a83bb57d6265de7cfbb3214db72e5a8f358 [diff]

[Cleanup] Removed travis build

.travis.yml[Deleted - diff]
.travisCI/runPrecheck.sh[Deleted - diff]
.travisCI/travisBuild.sh[Deleted - diff]

3 files changed

tree: 599407a4e504c52bae9c987e01775f04974ddaf3

README.md

Caravel-SOFA-HD

Highlights

Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
Designed with Skywater130nm PDK with HD standard cell library
Base K4 architecture from VPR with 40 vertical and horizontal channels
No adders (carry-chain) or flipflop reset pins
Designed using commercial PnR tool

Contribution

NOTE

This repository is created for The eFabless Open MPW shuttle program submission
The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel