commit | f1d54729e99e3bad6d3a8487407775f4445d94d4 | [log] [tgz] |
---|---|---|
author | Mohamed Shalan <mshalan@aucegypt.edu> | Wed Nov 18 15:28:17 2020 +0200 |
committer | GitHub <noreply@github.com> | Wed Nov 18 15:28:17 2020 +0200 |
tree | d6b203bae49bacaaff9e5b36172430c326157780 | |
parent | 11e6d4e3de2701c3f3bfabf2b4766f524fa8cc74 [diff] |
Delete ciic_harness.png
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: