| commit | d01c63748cd1b4f3b3201504f6d858936a5cd348 | [log] [tgz] |
|---|---|---|
| author | Tim Edwards <tim@opencircuitdesign.com> | Wed Oct 28 13:40:03 2020 -0400 |
| committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Wed Oct 28 22:58:29 2020 +0200 |
| tree | 0d76f16f945d7c9139e961fa03e5f87228b0e670 | |
| parent | 22d29d6e8973054c55f7832e248749a36388bd27 [diff] |
Modified the mprj_ctrl.v verilog to be completely clear about how many bits are set to zero for each of the contributers to the iomem_rdata_pre vector.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: