commit | db745b7977732da03851fcd7612d2e4ec9f63a50 | [log] [tgz] |
---|---|---|
author | Ahmed Ghazy <ahmed.ghazy@efabless.com> | Wed Nov 04 15:22:08 2020 +0000 |
committer | Ahmed Ghazy <ahmed.ghazy@efabless.com> | Wed Nov 04 15:22:51 2020 +0000 |
tree | c5118bed1866591ed070c172531c5ff29b3cc100 | |
parent | f8e6154eaeecd6d6edcfa19cda6a64cdd2f2db5d [diff] |
Updated openlane configs for mgmt_core and digital_pll
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: