| commit | bcc254495db85ccc0a258f07ee34b7fad2bb7217 | [log] [tgz] |
|---|---|---|
| author | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Tue Nov 10 23:00:14 2020 +0200 |
| committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Tue Nov 10 23:00:14 2020 +0200 |
| tree | 59649a8fcbbee6b11e88771d98f77f96514853b4 | |
| parent | 9eeea83701d86ff4312d309c9250f1faadaf6d8e [diff] |
Add a new sram_1rw1r_32_256_8_sky130 wrapper - includes extended pins for routability and two extra power stripes to automate power routing
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: