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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-015 / b41204cbd952dd5cf2e633b809eab21da963020d
commitb41204cbd952dd5cf2e633b809eab21da963020d[log] [tgz]
authorR. Timothy Edwards <tim@opencircuitdesign.com>Tue Nov 10 22:54:49 2020 -0500
committerGitHub <noreply@github.com>Tue Nov 10 22:54:49 2020 -0500
tree78433c22185f25cebf9d28608b8a57b13a2d1573
parentbcc254495db85ccc0a258f07ee34b7fad2bb7217 [diff]
parent61dce92ffadeb8742dadd290f03bc354f1405b8d [diff]
Merge pull request #35 from Manarabdelaty/rename_lvs

Renamed lvs guard to use_power_pins
tree: 78433c22185f25cebf9d28608b8a57b13a2d1573
  1. def/
  2. doc/
  3. gds/
  4. lef/
  5. macros/
  6. mag/
  7. openlane/
  8. scripts/
  9. spi/
  10. verilog/
  11. info.yaml
  12. LICENSE
  13. README.md
README.md

CIIC Harness

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware that can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)

Mega Project Area

This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.