commit | 72e52c6a014cd77128552124a5f8117db94797e4 | [log] [tgz] |
---|---|---|
author | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Mon Oct 26 16:44:41 2020 +0200 |
committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Wed Oct 28 22:58:29 2020 +0200 |
tree | 902b56cb8c7114fae7d92a5edfe9004a84031809 | |
parent | 6b6803f8178d1e92227d66a1dfca2eb2db5f1221 [diff] |
Added what can be pushed of chip_io - Pad frame fully labelled on both sides - This more like just the padframe, chip_io contains pad-to-pad connections that is not done in this push - Added its openlane config
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: