| commit | 68e0363b0541a1cfd61500c8074b60480ea2cf5d | [log] [tgz] |
|---|---|---|
| author | Manar <manarabdelatty@aucegypt.edu> | Mon Nov 09 13:25:13 2020 +0200 |
| committer | Manar <manarabdelatty@aucegypt.edu> | Mon Nov 09 13:25:13 2020 +0200 |
| tree | 7cb2b164f76a7977b3ebd9e56cc448b2eebfc69d | |
| parent | 2517fa8538d616830340da4984502271fb902f19 [diff] |
Added power pins to the custom memory cells - connected mem_wb to power (guarded by lvs) - updated defines.v to use the custom memory
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: