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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-015 / 53d9218c9e1613c4616ca9d4f71195778520e66d
commit53d9218c9e1613c4616ca9d4f71195778520e66d[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Sun Oct 11 21:47:40 2020 -0400
committerTim Edwards <tim@opencircuitdesign.com>Sun Oct 11 21:47:40 2020 -0400
treee8c309d9c95305b4f5cebf641b5164db9f17b4b3
parentef2b68d44d85b1be0eb2b972418158fbd03fc57c [diff]
Added additional protection for all the signals output to the user
space, to force them to be tristated whenever the user space 1.8V
supply is missing.
3 files changed
tree: e8c309d9c95305b4f5cebf641b5164db9f17b4b3
  1. doc/
  2. verilog/
  3. README.md
README.md

CIIC Harness (Phase 1)

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below

Mega Project Area

This is the user space. It has limitted silicon area (???) as well as a fixed number of I/O pads (???). The repoo contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.