| commit | 0445c08e6ae05805b5a8cb8319bbd3c321a04225 | [log] [tgz] |
|---|---|---|
| author | Tim Edwards <tim@opencircuitdesign.com> | Tue Oct 27 20:53:54 2020 -0400 |
| committer | Ahmed Ghazy <ax3ghazy@aucegypt.edu> | Wed Oct 28 22:58:29 2020 +0200 |
| tree | 51ccdb87f9d2869814ee1dc424ce40ecf19b17e0 | |
| parent | ba3289096e696a0449bb485d8a28f8559fa3066a [diff] |
Revised the mprj_ctrl module verilog so that it does not generate conflicting drivers for the register input from the viewpoint of the synthesis tools. Updated the testbench to remove references to the "mega-project", and made a few updates to the datasheet.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC is given below
(NOTE: This needs updating; see the README file for an updated list.)
This is the user space. It has limited silicon area (TBD, about 2.8mm x 2.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: