commit | f9fef50fb25bcc958d698ae9b3368955f621b4da | [log] [tgz] |
---|---|---|
author | Tim Edwards <tim@opencircuitdesign.com> | Fri Nov 20 13:55:57 2020 -0500 |
committer | Tim Edwards <tim@opencircuitdesign.com> | Fri Nov 20 13:55:57 2020 -0500 |
tree | 027a7e49b61278abf94dc61664edc39aafa59922 | |
parent | f084de3a318b079b12aef4b6d16791287d9a1e72 [diff] |
Added ngspice netlist and testbenches for the power-on-reset circuit.
A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.
The managment SoC runs firmware that can be used to:
The memory map of the management SoC can be found here
This is the user space. It has limited silicon area (TBD, about 3.1mm x 3.8mm) as well as a fixed number of I/O pads (37) and power pads (10). See the Caravel premliminary datasheet for details. The repository contains a sample mega project that contains a binary 32-bit up counter.
The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided: