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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-014 / d418fddfe98a4865df5d0730f7c0767db46541a3
commitd418fddfe98a4865df5d0730f7c0767db46541a3[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Fri Oct 09 11:51:48 2020 -0400
committerTim Edwards <tim@opencircuitdesign.com>Fri Oct 09 11:51:48 2020 -0400
tree221f8d224b6101805fb9297181e8d0c9e8ef09ab
parent700f91676150067f792bd0c8b060272334fe13d3 [diff]
Added management flash SPI pass-through mode testbench and debugged it.
9 files changed
tree: 221f8d224b6101805fb9297181e8d0c9e8ef09ab
  1. doc/
  2. verilog/
  3. README.md
README.md

CIIC Harness (Phase 1)

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below

Mega Project Area

This is the user space. It has limitted silicon area (???) as well as a fixed number of I/O pads (???). The repoo contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.